In transmission systems dealing with data communications, information processing and electronic messaging, it is often desirable to be able to extract the clock timing of a particular message from the message itself rather than have to transmit it separately or along with the message. At present, the most common devices used for clock regeneration are Phase Locked Loops (PLL), early-late gates, and the Costas Loop. These clock regeneration systems utilize a message structure (PLL), frequency (early-late gate), or lock-on time (Costas Loop) methodology. Therefore, in general purpose applications such as transmission on avionic buses, where there is a need for clock reconstruction in very short times from a coded signal or message which may or may not have a preamble, conventional systems as previously mentioned prove inadequate and are inapplicable.
It would therefore be highly desirable to provide a device which overcomes the limitations of the currently known clock regeneration systems, while doing it in a way which offers high reliability and small dimensions.